Eric Breckenfeld
Director of Technology Policy
91成人
Eric Breckenfeld is the Director of Technology Policy at the 91成人 (91成人), where he directs 91成人鈥檚 research and development activities as well as the association鈥檚 education and workforce development efforts. Prior to joining 91成人, Eric was a Lead Scientist at Booz Allen Hamilton where he served as a consultant for predominantly U.S. defense clients, including DARPA and the U.S. Naval Sea Systems Command in the areas of electronic materials and device physics, robotics and autonomy, and hardware/supply chain security. Before joining Booz Allen Hamilton, Eric was an AAAS Science and Technology Policy Fellow with the White House鈥檚 National Nanotechnology Initiative where he led the Sustainable Nanomanufacturing and Nanoelectronics for 2020 and Beyond initiatives. Previously, Eric was a National Research Council Fellow at the Naval Research Laboratory.
Eric received his B.S. degree in Physics from the University of Wisconsin-Madison and his Ph.D. in Materials Science and Engineering from the University of Illinois Urbana-Champaign.
Gilroy Vandentop
Director of Corporate University Research
Intel
Gilroy Vandentop is the Director of Corporate University Research, within Intel Labs.聽 His team manages Intel鈥檚 university research investments for key internal technology and business customers. Gilroy is also on the board of the Semiconductor Research Corporation, an industry wide consortium. He managed the SRC STARnet program and is currently chair for the Governing Council of the JUMP/nCORE program.
Gilroy moved to Intel Labs from TMG鈥檚 Components Research group in 2015. While in Components Research, he formed the Novel Materials group and managed Intel鈥檚 EUV program through transfer into technology development. From 2000 to 2006, he was responsible for the Packaging Research group in Chandler, AZ. During his first 10 years at Intel, Gilroy worked in Logic Tech
David H. Robertson
Senior Technology Director – Automotive, Communications and Aerospace
Analog Devices
David H. Robertson has been with Analog Devices since graduating from Dartmouth College in 1985. He has worked on a wide variety of high speed data converters on a variety of semiconductor process technologies, across aerospace/defense, instrumentation, communications, and consumer. Dave is presently a Senior Technology Director in Analog鈥檚 Automotive, Communications and Aerospace group, and is an ADI Technical Fellow.
Dave holds 15 patents on converter and mixed signal circuits, has more than a dozen published peer reviewed papers. Dave is a senior member of the IEEE, and served on the ISSCC technical program committee from 2000 through 2008, chairing the Analog and Data Converter subcommittees from 2002 to 2008, and chaired the ISSCC Forum committee in 2021. He is presently chairing the analog/mixed signal working group of the Semiconductor Research Corporation鈥檚 industry road-mapping effort.
Dr. Raja Swaminathan
CVP, Advanced Packaging
AMD
Dr. Raja Swaminathan is CVP, Advanced Packaging instrumental in the development of AMD鈥檚 industry leading advanced packaging roadmap. Raja has been a leader in silicon-package-system architecture definition and a co-design expert with extensive experience introducing new technologies and innovation across the silicon-packaging spectrum at Intel, Apple and AMD. He鈥檚 helped enable PPAC (power, performance, area, and cost) improvements as well as introduction of novel heterogeneous architectures throughout his career: EMIB, Apple鈥檚 Mx package architectures, 3D V-Cache, Elevated Fan-Out Bridge, High Performance Fanout to name a few. Raja received his Bachelors鈥� from IIT Madras and PhD from Carnegie Mellon University and has over 40 US patents in the field. He is an IEEE Senior Member and is on the technical advisory board for the Semiconductor research corporation (SRC) and Deca Technologies.
Steve Pawlowski
VP Advanced Computing Solutions
Micron
Steve Pawlowski is corporate vice president of advanced computing solutions at Micron Technology. He is responsible for defining and developing innovative memory solutions for the enterprise and high-performance computing markets. Prior to joining Micron in July 2014, Steve was a senior fellow and the chief technology officer for Intel鈥檚 Data Center and Connected Systems Group. His extensive industry experience includes 31 years at Intel, where he held several high-level positions and led teams in the design and development of next-generation system architectures and computing platforms. Steve earned bachelor鈥檚 degrees in electrical engineering and computer systems engineering technology from the Oregon Institute of Technology and a master鈥檚 degree in computer science and engineering from the Oregon Graduate Institute. He also holds 58 patents.
Vijay Narayanan Ph.D.
IBM Fellow & Strategist, Physics of AI
Senior Manager, PCM & AI Materials
IBM T. J Watson Research Center
Dr. Narayanan received his B.Tech. in Metallurgical Engineering聽 from the Indian Institute of Technology, Madras (1995), and his M.S. (1996) and Ph.D. (1999) in Materials Science and Engineering from Carnegie Mellon University. After completing post-doctoral research at Arizona State University, Dr. Narayanan joined the IBM T. J. Watson Research Center in 2001 where he pioneered High-母 /Metal Gate Research and Development from the early stages of materials discovery to development and implementation in manufacturing. These High-母 /Metal Gate materials form the basis of all recent IBM systems processors and of most low-power chips for mobile devices. Currently, Dr. Narayanan is an IBM Fellow and Senior Manager at IBM Research where he leads a worldwide IBM team developing Analog Accelerators for AI applications and novel materials innovation elements for advanced CMOS Logic. Dr. Narayanan is an IEEE Senior Member and was elected a Fellow of the American Physical Society in 2011. He is an author of over 100 journal and conference papers, holds more than 230 US patents, and has edited one book: 鈥淭hin Films On Silicon: Electronic And Photonic Applications鈥�.
